Responsible for this page: Oscar Gustafsson , oscarg@isy.liu.se
Page last update: 2011-10-25

[ Go to content ] [ Help ] [ Information about accessability ]

På svenska | A to Z Maps Web overview Contact us
Go to LiU.se

Department of Electrical Engineering

SIDTITEL

texten man vill ha








>
LiU - ISY > Electronics Systems > staff  > oscarg 

Oscar Gustafsson's list of publications

Theses

  1. O. Gustafsson, Architectures for Galois Field Arithmetics, LiTH-ISY-Ex-1725, Linköping University, Linköping, Sweden, Apr. 1998.
  2. O. Gustafsson, On Mapping of Digital Filter Algorithms to Hardware, Linköping Studies in Science and Technology, Thesis No. 838, Linköping University, Sweden, June 2000.
  3. O. Gustafsson, Contributions to Low-Complexity Digital Filters, Linköping Studies in Science and Technology, Dissertations, No. 837, Linköping University, Sweden, Sept. 2003.

Book Chapters

  1. O. Gustafsson and L. Wanhammar, "Arithmetic," in Handbook of Signal Processing Systems, Springer, 2010.
  2. O. Gustafsson and L. Wanhammar, "Low-complexity and high-speed constant multiplications for digital filters using carry-save arithmetic" in Digital Filters, Intech, 2011.

Journal Papers

  1. O. Gustafsson, H. Johansson, and L. Wanhammar, "Single filter frequency masking high-speed recursive digitals filters," Circuits, Systems, and Signal Processing, vol. 22, no. 2, pp. 219-238, 2003.
  2. O. Gustafsson, H. Johansson, and L. Wanhammar, "Single filter frequency-response masking FIR filters," Journal Circuits, Systems, and Computers. vol. 12, no. 5, pp. 601-630, Oct. 2003.
  3. O. Gustafsson, "Graph-based code word selection for memoryless low power bus coding," IEE Electronics Letters, vol. 40, no. 24, pp. 1531-1532, 25 Nov. 2004.
  4. H. Johansson and O. Gustafsson, "Interpolation, decimation, and Mth-band linear-phase FIR filters utilizing the Farrow structure," IEEE Trans. Circuits Syst.-I, vol. 52, no. 10, pp. 2197-2207, Oct. 2005.
  5. O. Gustafsson, A. G. Dempster, K. Johansson, M. D. Macleod, and L. Wanhammar, "Simplified design of constant coefficient multipliers," Circuits, Systems and Signal Processing, vol. 25, no. 2, pp. 225-251, Apr. 2006.
  6. K. Johansson, O. Gustafsson, and L. Wanhammar, "Multiple constant multiplication for digit-serial implementation of low power FIR filters," WSEAS Trans. Circuits Syst., vol. 5, no. 7, pp. 1001-1008, July 2006.
  7. A. Blad and O. Gustafsson, "Energy-efficient data representation in LDPC decoders," IET Electronics Letters, vol. 42, no. 18, pp. 1051-1052, 31 Aug. 2006.
  8. O. Gustafsson, "Lower bounds for constant multiplication problems," IEEE Trans. Circuits Syst.-II, vol. 54, no. 11, pp. 974-978, Nov. 2007.
  9. O. Gustafsson, "Comments on `A 70 MHz multiplierless FIR Hilbert transformer in 0.35 μm standard CMOS library'," IEICE Trans. Fundamentals, vol. E91-A, no. 3, Mar. 2008.
  10. K. Johansson, O. Gustafsson, and L. Wanhammar, "Implementation of elementary functions for logarithmic number systems," IET Computers and Digital Techniques, vol. 2, no. 4, pp. 295-304, July 2008.
  11. A. Blad and O. Gustafsson, "Integer linear programming-based bit-level optimization for high-speed FIR decimation filter architectures," Circuits, Systems, and Signal Processing, vol. 29, no. 1, pp. 81-101, Feb. 2010.
  12. O. Gustafsson and F. Qureshi, "Addition aware quantization for low complexity and high precision constant multiplication," IEEE Signal Processing Letters, vol. 17, no. 2, pp. 173-176, Feb. 2010.
  13. M. Faust, O. Gustafsson, and C.-H. Chang, "Fast and VLSI efficient binary-to-CSD encoder using bypass signal," Electronics Letters, vol. 47, no. 1, Jan. 6, 2011.
  14. E. G. Larsson and O. Gustafsson, "The impact of dynamic voltage and frequency scaling on multicore DSP algorithm design," IEEE Signal Processing Mag, vol. 28, no. 3, pp. 127­144, May 2011.
  15. S. Athar, O. Gustafsson, F. Qureshi and I. Kale, "On the efficient computation of single-bit input word length pipelined FFTs," IEICE Electronics Express, vol. 8, no. 17, Sept. 10, 2011.
  16. M. Garrido, O. Gustafsson, and J. Grajal, "Accurate rotations based on coefficient scaling," IEEE Trans. Circuits Syst. II - Express Briefs, vol. 58, no. 10, pp. 662-666, Oct. 2011.
  17. M. Garrido, J. Grajal, and O. Gustafsson, "Optimum circuits for bit reversal," IEEE Trans. Circuits Syst. II - Express Briefs, vol. 58, no. 10, pp. 657-661, Oct. 2011.
  18. F. Qureshi and O. Gustafsson, "Low-complexity constant multiplication based on trigonometric identities with applications to FFTs," IEICE Trans. Fund., vol. E94-A, no. 11, Nov. 2011.
  19. Z. U. Sheikh, and O. Gustafsson, "Linear Programming Design of Coefficient Decimation FIR Filters", IEEE Trans. Circuits Syst. II, accepted.

International Conference Papers

  1. O. Gustafsson, "A digit-serial polynomial basis GF(2^m) multiplier," in Proc. Nordic Signal Processing Symp., Hanstholm, Denmark, June 8-11, 1998.
  2. O. Gustafsson and L. Wanhammar, "Implementation of maximally fast ladder wave digital filters using a numerically equivalent state-space representation," in Proc. IEEE Int. Symp. Circuits Syst., Orlando, Florida, May 30-June 2, 1999, vol. 3, pp. 419-422.
  3. O. Gustafsson and L. Wanhammar, "Maximally fast scheduling of bit-serial lattice wave digital filters using constrained third-order sections," in Proc. IEEE Int. Conf. Electronics Circuits Syst., Paphos, Cyprus, Sept. 1999, pp. 729-732.
  4. O. Gustafsson, H. Johansson, and L. Wanhammar, "Design and efficient implementation of high-speed narrow-band recursive digital filters using single filter frequency masking techniques," in Proc. IEEE Int. Symp. Circuits Syst., Geneva, Switzerland, May 28-31, 2000, pp. 359-362.
  5. O. Gustafsson and L. Wanhammar, "Maximally fast numerically equivalent state-space recursive digital filters using distributed arithmetic," in Proc. Nordic Signal Processing Symp., Kolmården, Sweden, June 13-15, 2000, pp. 227-230.
  6. O. Gustafsson and L. Wanhammar, "Maximally fast scheduling of bit-serial lattice wave digital filters using three-port adaptor allpass sections," in Proc. Nordic Signal Processing Symp., Kolmården, Sweden, June 13-15, 2000, pp. 441-444.
  7. O. Gustafsson, H. Johansson, and L. Wanhammar, "Design and efficient implementation of narrow-band single frequency masking FIR filters," in Proc. X European Signal Processing Conf., Tampere, Finland, Sept. 2000, pp. 259-262.
  8. O. Gustafsson, H. Johansson, and L. Wanhammar, "Design and efficient implementation of single filter frequency-response masking FIR filters," in Proc. IEEE Int. Symp. Intelligent Signal Processing Communication Syst., Honolulu, Hawaii, Nov. 5-8, 2000, pp. 135-140.
  9. O. Gustafsson, H. Ohlsson, and L. Wanhammar, "Minimum-adder integer multipliers using carry-save adders," in Proc. IEEE Int. Symp. Circuits Syst., Sydney, Australia, May 6-9, 2001, vol. 2, pp. 709-712.
  10. H. Ohlsson, O. Gustafsson, and L. Wanhammar, "Arithmetic transformations for increased maximal sample rate of bit-parallel bireciprocal lattice wave digital filters," in Proc. IEEE Int. Symp. Circuits Syst., Sydney, Australia, May 6-9, 2001, vol. 2, pp. 825-828.
  11. O. Gustafsson, H. Johansson, and L. Wanhammar, "Narrow-band and wide-band single filter frequency masking FIR filters," in Proc. IEEE Int. Symp. Circuits Syst., Sydney, Australia, May 6-9, 2001, vol. 2, pp. 181-184.
  12. O. Gustafsson, H. Johansson, and L. Wanhammar, "Narrow-band and wide-band high-speed recursive digital filters using single filter frequency masking techniques," in Proc. Int. Symp. Signal Processing Appl., Kuala Lumpur, Malaysia, Aug. 13-16, 2001, vol. 1, pp. 36-39.
  13. O. Gustafsson, H. Johansson, and L. Wanhammar, "An MILP approach for the design of linear-phase FIR filters with minimum number of signed-power-of-two terms," in Proc. European Conf. Circuit Theory Design, Espoo, Finland, Aug. 28-31, 2001.
  14. O. Gustafsson and L. Wanhammar, "Decreasing the minimal sample period for recursive filters implemented using distributed arithmetic," in Proc. IEEE Int. Conf. Electronics Circuits Syst., Malta, Sept. 2-5, 2001, vol. 1, pp. 59-62.
  15. H. Ohlsson, O. Gustafsson, H. Johansson, and L. Wanhammar, "Implementation of bit-parallel lattice wave digital filters with increased maximal sample rate," in Proc. IEEE Int. Conf. Electronics Circuits Syst., Malta, Sept. 2-5, 2001, vol. 1, pp. 71-74.
  16. H. Ohlsson, O. Gustafsson, M. Vesterbacka, and L. Wanhammar, "A study on pipeline-interleaved digital filters for low power," in Proc. IEEE NorChip Conf., Kista, Sweden, Nov. 12-13, 2001, pp. 93-98.
  17. O. Gustafsson, A. G. Dempster, and L. Wanhammar, "Extended results for minimum-adder constant integer multipliers," in Proc. IEEE Int. Symp. Circuits Syst., Scottsdale, AZ, May 26-29, 2002, vol. 1, pp. 73-76.
  18. O. Gustafsson and L. Wanhammar, "Design of linear-phase FIR filters combining subexpression sharing with MILP," in Proc. IEEE Midwest Symp. Circuits Syst., Tulsa, OK, Aug. 4-7, 2002, vol. 3, pp. 9-12.
  19. O. Gustafsson and L. Wanhammar, "A novel approach to multiple constant multiplication using minimum spanning trees," in Proc. IEEE Midwest Symp. Circuits Syst., Tulsa, OK, Aug. 4-7, 2002, vol. 3, pp. 652-655.
  20. O. Gustafsson and L. Wanhammar, "Bit-level pipelinable general and fixed coefficient digit-serial/parallel multipliers based on shift-accumulation," in Proc. IEEE Int. Conf. Electronics Circuits Syst., Dubrovnik, Croatia, Sept. 15-18, 2002, vol. 2, pp. 493-496.
  21. O. Gustafsson and L. Wanhammar, "ILP modelling of the common subexpression sharing problem," in Proc. IEEE Int. Conf. Electronics Circuits Syst., Dubrovnik, Croatia, Sept. 15-18, 2002, vol. 3, pp. 1171-1174.
  22. O. Gustafsson and L. Wanhammar, "Design of linear-phase FIR filters with minimum Hamming distance," in Proc. IEEE Nordic Signal Processing Symp., Hurtigruten, Norway, Oct. 4-7, 2002.
  23. A. G. Dempster, O. Gustafsson, and J. O. Coleman, "Towards an algorithm for matrix multiplier blocks," in Proc. European Conf. Circuit Theory Design, Kraków, Poland, Sept. 1-4, 2003, vol. 3, pp. 9-12.
  24. O. Gustafsson, H. Ohlsson, M. Mohsen, and L. Wanhammar, "Implementation of high-speed single filter frequency-response masking recursive filters," in Proc. IEEE NorChip Conf., Riga, Latvia, Nov. 10-11, 2003, pp. 260-263.
  25. K. Johansson, O. Gustafsson, and L. Wanhammar, "Switching activity in bit-serial constant coefficient serial/parallel multipliers," in Proc. IEEE NorChip Conf., Riga, Latvia, Nov. 10-11, 2003, pp. 291-294.
  26. O. Gustafsson, H. Johansson, and L. Wanhammar, "MILP design of frequency-response masking FIR filters with few SPT terms," in Proc. Int. Symp. Control Communications Signal Processing, Hammamet, Tunisia, March 21-24, 2004, pp. 405-408.
  27. K. Johansson, O. Gustafsson, A. G. Dempster, and L. Wanhammar, "Algorithm to reduce the number of shifts and additions in multiplier blocks using serial arithmetic," in Proc. IEEE Mediterranean Electrotechnical Conf., Dubrovnik, Croatia, May 12-15, 2004.
  28. H. Ohlsson, O. Gustafsson, and L. Wanhammar, "Implementation of low-complexity FIR filters using a minimum spanning tree," in Proc. IEEE Mediterranean Electrotechnical Conf., Dubrovnik, Croatia, May 12-15, 2004, pp. 261-264.
  29. H. Johansson and O. Gustafsson, "Mth-band linear-phase FIR filter interpolators and decimators utilizing the Farrow structure," in Proc. IEEE Int. Symp. Circuits Syst., Vancouver, Canada, May 23-26, 2004, vol. 3, pp. 129-132.
  30. O. Gustafsson, A. G. Dempster, and L. Wanhammar, "Multiplier blocks using carry-save adders," in Proc. IEEE Int. Symp. Circuits Syst., Vancouver, Canada, May 23-26, 2004, vol. 2, pp. 473-476.
  31. K. Johansson, O. Gustafsson, and L. Wanhammar, "Low-complexity bit-serial constant-coefficient multipliers," in Proc. IEEE Int. Symp. Circuits Syst., Vancouver, Canada, May 23-26, 2004, vol. 3, pp. 649-652.
  32. H. Ohlsson, O. Gustafsson, and L. Wanhammar, "A shifted permuted difference coefficient method," in Proc. IEEE Int. Symp. Circuits Syst., Vancouver, Canada, May 23-26, 2004, vol. 3, pp. 161-164.
  33. K. Johansson, O. Gustafsson, and L. Wanhammar, "Switching activity in bit-serial constant coefficient multipliers," in Proc. IEEE Int. Symp. Circuits Syst., Vancouver, Canada, May 23-26, 2004, vol. 2, pp. 469-472.
  34. O. Gustafsson and A. G. Dempster, "On the use of multiple constant multiplication in polyphase FIR filters and filter banks," in Proc. Nordic Signal Processing Symp., Espoo, Finland, June 9-11, 2004, pp. 53-56.
  35. K. Landernäs, J. Holmberg, and O. Gustafsson, "Implementation of bit-level pipelined digit-serial multipliers," in Proc. Nordic Signal Processing Symp., Espoo, Finland, June 9-11, 2004, pp. 125-128.
  36. T. Lindkvist, J. Löfvenberg, and O. Gustafsson, "Deep sub-micron bus invert coding," in Proc. Nordic Signal Processing Symp., Espoo, Finland, June 9-11, 2004, pp. 133-136.
  37. O. Gustafsson, H. Ohlsson, and L. Wanhammar, "Low-complexity constant coefficient matrix multiplication using a minimum spanning tree approach," in Proc. Nordic Signal Processing Symp., Espoo, Finland, June 9-11, 2004, pp. 141-144.
  38. K. Johansson, O. Gustafsson, and L. Wanhammar, "Power estimation for ripple-carry adders with correlated input data," in Proc. Int. Workshop Power Timing Modeling, Optimization, Simulation, Santorini, Greece, Sept. 15-17, 2004.
  39. O. Gustafsson, H. Ohlsson, and L. Wanhammar, "Improved multiple constant multiplication using minimum spanning trees," in Proc. Asilomar Conf. Signals, Syst., Comp., Pacific Grove, CA, Nov. 7-10, 2004, pp. 63-66.
  40. A. G. Dempster, M. D. Macleod, and O. Gustafsson, "Comparison of graphical and sub-expression elimination methods for design of efficient multipliers," in Proc. Asilomar Conf. Signals, Syst., Comp., Pacific Grove, CA, Nov. 7-10, 2004, pp. 72-76.
  41. O. Gustafsson, J. O. Coleman, A. G. Dempster, and M. D. Macleod, "Low-complexity hybrid form FIR filters using matrix multiple constant multiplication," in Proc. Asilomar Conf. Signals, Syst., Comp., Pacific Grove, CA, Nov. 7-10, 2004, pp. 77-80.
  42. A. Åslund, O. Gustafsson, H. Ohlsson, and L. Wanhammar, "Power analysis of high throughput pipelined carry-propagation adders," in Proc. IEEE Norchip Conf., Oslo, Norway, Nov. 8-9, 2004, pp. 139-142.
  43. H. Ohlsson, B. Mesgarzadeh, K. Johansson, O. Gustafsson, P. Löwenborg, H. Johansson, and A. Alvandpour, "A 16 GSPS 0.18 μm CMOS decimator for single-bit ΣΔ-modulation," in Proc. IEEE Norchip Conf., Oslo, Norway, Nov. 8-9, 2004, pp. 175-178.
  44. O. Gustafsson and H. Ohlsson, "A low power decimation filter architecture for high-speed single-bit sigma-delta modulation," in Proc. IEEE Int. Symp. Circuits Syst., Kobe, Japan, May 23-26, 2005, pp. 1453-1456.
  45. K. Johansson, O. Gustafsson, and L. Wanhammar, "Implementation of low-complexity FIR filters using serial arithmetic," in Proc. IEEE Int. Symp. Circuits Syst., Kobe, Japan, May 23-26, 2005, pp. 1449-1452.
  46. L. Wanhammar, K. Johansson, and O. Gustafsson, "Efficient computation of sine and cosine using a weighted sum of bit-products," in Proc. European Conf. Circuit Theory Design, Cork, Ireland, Aug. 29-Sept. 1, 2005.
  47. K. Johansson, O. Gustafsson, and L. Wanhammar, "A detailed complexity model for multiple constant multiplication and an algorithm to minimize the complexity," in Proc. European Conf. Circuit Theory Design, Cork, Ireland, Aug. 29-Sept. 1, 2005.
  48. A. Blad, O. Gustafsson, and L. Wanhammar, "An early decision decoding algorithm for LDPC codes using dynamic thresholds," in Proc. European Conf. Circuit Theory Design, Cork, Ireland, Aug. 29-Sept. 1, 2005.
  49. A. Blad, O. Gustafsson, and L. Wanhammar, "A hybrid early decision-probability propagation decoding algorithm for low-density partiy-check codes," in Proc. Asilomar Conf. Signals, Syst., Comp., Pacific Grove, CA, Oct. 30-Nov. 2, 2005, pp. 586-590.
  50. O. Gustafsson, K. Johansson, and L. Wanhammar, "Optimization and quantization effects for sine and cosine computation using a sum of bitproducts," in Proc. Asilomar Conf. Signals, Syst., Comp., Pacific Grove, CA, Oct. 30-Nov. 2, 2005, pp. 1347-1351.
  51. A. Blad, O. Gustafsson, and L. Wanhammar, "Implementation aspects of an early decision decoder for LDPC codes," in Proc. IEEE Norchip Conf., Oulu, Finland, Nov. 21-22, 2005.
  52. K. Johansson, O. Gustafsson, and L. Wanhammar, "Low power architectures for sine and cosine computation using a sum of bit-products," in Proc. IEEE Norchip Conf., Oulu, Finland, Nov. 21-22, 2005.
  53. E. Backenius, E. Säll, and O. Gustafsson, "Bidirectional conversion to minimum signed-digit representation," IEEE Int. Symp. Circuits Syst., Kos Island, Greece, May 21-24, 2006.
  54. K. Johansson, O. Gustafsson, and L. Wanhammar, "Approximation of elementary functions using a weighted sum of bit-products," IEEE Int. Symp. Circuits Syst., Kos Island, Greece, May 21-24, 2006.
  55. K. Johansson, O. Gustafsson, and L. Wanhammar, "Trade-offs in multiplier block algorithms for low power digit-serial FIR filters," in Proc. WSEAS Int. Conf. Circuits, Vouliagmeni, Greece, July 10-12, 2006.
  56. O. Gustafsson and K. Johansson, "Multiplierless piecewise linear approximation of elementary functions," in Proc. Asilomar Conf. Signals, Syst., Comp., Pacific Grove, CA, Oct. 29-Nov. 1, 2006, pp. 1678-1681.
  57. O. Gustafsson and H. Johansson "Efficient implementation of FIR filter based rational sampling rate converters using constant matrix multiplication," in Proc. Asilomar Conf. Signals, Syst., Comp., Pacific Grove, CA, Oct. 29-Nov. 1, 2006, pp. 888-891.
  58. K. Johansson, O. Gustafsson, and L. Wanhammar, "Conversion and addition in logarithmic number systems using a sum of bit-products," in Proc. IEEE Norchip Conf., Linköping, Sweden, Nov. 20-21, 2006, pp. 39-42.
  59. K. Holm and O. Gustafsson, "'Low-complexity and low-power color space conversion for digital video," in Proc. IEEE Norchip Conf., Linköping, Sweden, Nov. 20-21, 2006, pp. 179-182.
  60. O. Gustafsson and H. Johansson, "Complexity comparison of linear-phase half-band and general FIR filters," Asia-Pacific Conf. Circuits Syst., Singapore, Dec. 4-7, 2006.
  61. H. Johansson, O. Gustafsson, K. Johansson, and L. Wanhammar, "Adjustable fractional-delay FIR filters using the Farrow structure and multirate techniques," Asia-Pacific Conf. Circuits Syst., Singapore, Dec. 4-7, 2006, pp. 1055-1058.
  62. O. Gustafsson, K. Johansson, H. Johansson, and L. Wanhammar, "Implementation of polyphase decomposed FIR filters for interpolation and decimation using multiple constant multiplication techniques," Asia-Pacific Conf. Circuits Syst., Singapore, Dec. 4-7, 2006, pp. .924-927.
  63. S. Tahmasbi Oskuii, P. G. Kjeldsberg, and O. Gustafsson, "Transition-activity aware design of reduction-stages for parallel multipliers," Great Lakes Symp. on VLSI, Stresa-Lago Maggiore, Italy, March 11-13, 2007.
  64. O. Gustafsson and H. Johansson, "Complexity comparison of linear-phase Mth-band and general FIR filters," IEEE Int. Symp. Circuits Syst., New Orleans, LA, May 27-30, 2007, pp. 2335-2338.
  65. O. Gustafsson, "A difference based adder graph heuristic for multiple constant multiplication problems," IEEE Int. Symp. Circuits Syst., New Orleans, LA, May 27-30, 2007, pp. 1097-1100.
  66. O. Gustafsson and M. Olofsson, "Complexity reduction of constant matrix computations over the binary field," in Proc. Int. Workshop on the Arithmetic of Finite Fields, Madrid, Spain, June 21-22, 2007, pp. 103-115.
  67. O. Gustafsson, S. Tahmasbi Oskuii, K. Johansson, and P. G. Kjeldsberg, "Switching activity reduction of MAC-based FIR filters with correlated input data," in Proc. Int. Workshop Power Timing Modeling, Optimization, Simulation, Göteborg, Sweden, Sept. 3-5, 2007, pp. 526-535.
  68. A. Eghbali, O. Gustafsson, H. Johansson, and P. Löwenborg, "On the complexity of multiplierless direct and polyphase FIR filter structures," International Symposium on Image and Signal Processing and Analysis, Istanbul, Turkey, Sept. 27-29, 2007, pp. 200-205.
  69. L. Wanhammar, B. Soltanian, K. Johansson, and O. Gustafsson, "Synthesis of circulator-tree wave digital filters," International Symposium on Image and Signal Processing and Analysis, Istanbul, Turkey, Sept. 27-29, 2007, pp. 206-211.
  70. O. Gustafsson and L. Wanhammar, "Low-complexity constant multiplication using carry-save arithmetic for high-speed digital filters," International Symposium on Image and Signal Processing and Analysis, Istanbul, Turkey, Sept. 27-29, 2007, pp. 212-217.
  71. O. Gustafsson, L. S. DeBrunner, V. DeBrunner, and H. Johansson, "On the design of sparse half-band like FIR filters," Asilomar Conf. Signals Syst. Comp., Pacific Grove, CA, Nov. 4-7, 2007.
  72. S. Tahmasbi Oskuii, P. G. Kjeldsberg, and O. Gustafsson, "A method for power optimized partial product reduction in parallel multipliers," IEEE Norchip Conf., Aalborg, Denmark, Nov. 19-20, 2007.
  73. K. Johansson, O. Gustafsson, and L. Wanhammar, "Bit-level optimization of shift-and-add based FIR filters" IEEE Int. Conf. Elec. Circuits Syst., Marrakesh, Morocco, Dec. 11-14, 2007.
  74. U. Meyer-Baese, O. Gustafsson, and A. Dempster, "A canonical minimised adder graph representation" in Proceedings SPIE, April 2008.
  75. S. Tahmasbi Oskuii, K. Johansson, O. Gustafsson, and P. G. Kjeldsberg, "Power optimization of weighted bit-product summation tree for elementary function generator," IEEE Int. Symp. Circuits Syst., Seattle, WA, May 18-21, 2008.
  76. K. Johansson, O. Gustafsson, and L. Wanhammar, "Switching activity estimation for shift-and-add based constant multipliers," IEEE Int. Symp. Circuits Syst., Seattle, WA, May 18-21, 2008.
  77. A. Blad and O. Gustafsson, "Bit-level optimized high-speed architectures for decimation filter applications," IEEE Int. Symp. Circuits Syst., Seattle, WA, May 18-21, 2008.
  78. L. Wanhammar, B. Soltanian, O. Gustafsson, and K. Johansson, "Synthesis of bandpass circulator-tree wave digital filters," in Proc. IEEE Int. Conf. Elec. Circ. Syst,., St. Julians, Malta, Aug. 31-Sept. 3, 2008.
  79. M. Abbas, F. Qureshi, Z. Sheikh, O. Gustafsson, H. Johansson, and K. Johansson, "Comparison of multiplierless implementation of nonlinear-phase versus linear-phase FIR filters," in Proc. Asilomar Conf. Signals Syst. Comp., Pacific Grove, CA, Oct. 26-29, 2008.
  80. E. Lindahl and O. Gustafsson, "Architecture-aware design of a decimation filter based on a dual wordlength multiply-accumulate unit," in Proc. Asilomar Conf. Signals Syst. Comp., Pacific Grove, CA, Oct. 26-29, 2008.
  81. O. Gustafsson, "Towards optimal multiple constant multiplication: a hypergraph approach," in Proc. Asilomar Conf. Signals Syst. Comp., Pacific Grove, CA, Oct. 26-29, 2008.
  82. O. Gustafsson and K. Johansson, "An empirical study on standard cell synthesis of elementary function look-up tables," in Proc. Asilomar Conf. Signals Syst. Comp., Pacific Grove, CA, Oct. 26-29, 2008.
  83. A. Havashki, L. Lundheim, P. G. Kjeldsberg, O. Gustafsson, and G. E. Øien, "Analysis of switching activity in DSP signals in the presence of noise," IEEE Eurocon, St. Petersburg, Russia, May 18-23, 2009.
  84. F. Qureshi and O. Gustafsson, "Low-complexity reconfigurable complex constant multiplication for FFTs," IEEE Int. Symp. Circuits Syst., Taipei, Taiwan, May 24-27, 2009.
  85. M. Abbas, O. Gustafsson, and H. Johansson, "Scaling of fractional delay filters based on the Farrow structure," IEEE Int. Symp. Circuits Syst., Taipei, Taiwan, May 24-27, 2009.
  86. K. Johansson, O. Gustafsson, and L. DeBrunner, "Estimation of the Switching Activity in Shift-and-Add Based Computations," IEEE Int. Symp. Circuits Syst., Taipei, Taiwan, May 24-27, 2009.
  87. F. Qureshi and O. Gustafsson, "Analysis of Twiddle Factor Memory Complexity of Radix-2^i Pipelined FFTs," Asilomar Conf. Signals Syst. Comp., Pacific Grove, CA, Nov. 1-4, 2009.
  88. O. Gustafsson and K. Johansson, "Techniques for Avoiding Sign-Extension in Multiple Constant Multiplication," Asilomar Conf. Signals Syst. Comp., Pacific Grove, CA, Nov. 1-4, 2009.
  89. K. Johansson, L. S. DeBrunner, O. Gustafsson, and V. DeBrunner, "Design of Multiplierless FIR Filters with an Adder Depth Versus Filter Order Trade-Off," Asilomar Conf. Signals Syst. Comp., Pacific Grove, CA, Nov. 1-4, 2009.
  90. F. Quereshi and O. Gustafsson, "Twiddle factor memory switching activity analysis of radix-22 and equivalent FFT algorithms," IEEE Int. Symp. Circuits Syst., Paris, France, May 30-June 2, 2010.
  91. A. Blad and O. Gustafsson, "Redundancy reduction for high-speed FIR filter architectures based on carry-save adder trees," IEEE Int. Symp. Circuits Syst., Paris, France, May 30-June 2, 2010.
  92. O. Gustafsson, K. Amiri, D. Andersson, A. Blad, C. Bonnet, J. R. Cavallaro, J. Declerckz, A. Dejonghe, P. Eliardsson, M. Glasse, A. Hayar, L. Hollevoet, C. Hunter, M. Joshi, F. Kaltenberger, R. Knopp, K. Le, Z. Miljanic, P. Murphy, F. Naessens, N. Nikaein, D. Nussbaum, R. Pacalet, P. Raghavan, A. Sabharwal, O. Sarode, P. Spasojevic, Y. Sun, H. M. Tullberg, T. Vander Aa, L. Van der Perre, M. Wetterwald, and M. Wu, "Architectures for cognitive radio testbeds and demonstrators - An overview," Int. Conf. Cognitive Radio Oriented Wireless Networks Comm., Cannes, France, June 9-11, 2010.
  93. Z. U. Sheikh, O. Gustafsson, and L. Wanhammar, "Design of sparse non-periodic narrow-band and wide-band FRM-like FIR filters," IEEE Int. Conf. Green Circuits Syst., Shanghai, China, June 21-23, 2010.
  94. M. Abbas, O. Gustafsson, and L. Wanhammar, "Power estimation of recursive and non-recursive CIC filters implemented in deep-submicron technology," IEEE Int. Conf. Green Circuits Syst., Shanghai, China, June 21-23, 2010.
  95. O. Gustafsson, K. Khursheed, M. Imran, and L. Wanhammar, "Generalized overlapping digit patterns for multi-dimensional sub-expression sharing," IEEE Int. Conf. Green Circuits Syst., Shanghai, China, June 21-23, 2010.
  96. Z. U. Sheikh and O. Gustafsson, "Design of narrow-band and wide-band frequency response masking filters using sparse non-periodic sub-filters," European Signal Processing Conf., Aalborg, Denmark, Aug. 23-27, 2010.
  97. A. Blad, O. Gustafsson, M. Zheng, and Z. Fei, "Integer linear programming based optimization of puncturing sequences for quasi-cyclic low-density parity-check codes" in Proc. Int. Symp. Turbo Codes & Iterative Inf. Processing, Brest, France, Sept. 6-10, 2010.
  98. M. Imran, K. Khursheed, M. O'Nils, and O. Gustafsson, "On the number representation in sub-expression sharing," in Proc. Int. Conf. Signal Elec. Syst., Gliwice, Poland, Sept. 7-10, 2010.
  99. M. Abbas and O. Gustafsson, "Switching activity estimation of CIC filter integrators," in Proc. PrimeAsia, Shanghai, China, Sept. 22-24, 2010.
  100. F. Qureshi, S. A. Alam, and O. Gustafsson, "4k-point FFT algorithms based on optimized twiddle factor multiplication for FPGAs," in Proc. PrimeAsia, Shanghai, China, Sept. 22-24, 2010.
  101. A. Blad, O. Gustafsson, M. Zheng, and Z. Fei, "Rate-compatible LDPC code decoder using check-node merging," in Proc. Asilomar Conf. Signals, Syst. Comp., Pacific Grove, CA, Nov. 7-10, 2010.
  102. C. Liu, O. Gustafsson, B. Ng, and B. Phillips, "Estimating Arithmetic for Decimation Filters," in Proc. Asilomar Conf. Signals, Syst. Comp., Pacific Grove, CA, Nov. 7-10, 2010.
  103. M. Abbas and O. Gustafsson, "Low-Complexity Parallel Evaluation of Powers by Exploitation of Redundancy," in Proc. Asilomar Conf. Signals, Syst. Comp., Pacific Grove, CA, Nov. 7-10, 2010.
  104. M. Faust, C.-H. Chang, and O. Gustafsson, "Reconfigurable Multiple Constant Multiplication Using Minimum Adder Depth," in Proc. Asilomar Conf. Signals, Syst. Comp., Pacific Grove, CA, Nov. 7-10, 2010.
  105. F. Qureshi, M. Garrido, and O. Gustafsson, "Alternatives for low-complexity rotators," in Proc. IEEE Int. Conf. Elec. Circuits, Syst., Athens, Greece, Dec. 12-15, 2010.
  106. S. A. Alam and O. Gustafsson, "Implementation of time-multiplexed sparse periodic FIR filters for FRM on FPGAs," IEEE Int. Symp. Circuits Syst., Rio de Janeiro, Brazil, May 15-18, 2011.
  107. K. Johansson, O. Gustafsson, L. S. DeBrunner, and L. Wanhammar, "Minimum adder depth multiple constant multiplication algorithm for low power FIR filters," IEEE Int. Symp. Circuits Syst., Rio de Janeiro, Brazil, May 15-18, 2011.
  108. C. Ingemarsson and O. Gustafsson, "On Using the Logarithmic Number System for Finite Wordlenght Matrix Inversion," in Proc. IEEE Midwest Symp. Circuits Syst., Seoul, South Korea, Aug. 7-10, 2011.
  109. F. Qureshi and O. Gustafsson, "Generation of All Radix-2 Fast Fourier Transform Algorithms Using Binary Trees," in Proc. European Conf. Circuit Theory Design, Linköping, Sweden, Aug. 29-31, 2011.
  110. C. Ingemarsson and O. Gustafsson, "Finite Wordlength Properties of Matrix Inversion Algorithms in Fixed-point and Logarithmic Number systems," in Proc. European Conf. Circuit Theory Design, Linköping, Sweden, Aug. 29-31, 2011.
  111. A. Blad and O. Gustafsson, "FPGA implementation of rate-compatible QC-LDPC code decoder," in Proc. European Conf. Circuit Theory Design, Linköping, Sweden, Aug. 29-31, 2011.
  112. S. Athar and O. Gustafsson, "Optimization of AIQ Representations for Low Complexity Wavelet Transforms," in Proc. European Conf. Circuit Theory Design, Linköping, Sweden, Aug. 29-31, 2011.
  113. T. Ahmed, M. Garrido, and O. Gustafssonm "A 512-point 8-parallel pipelined feedforward FFT for WPAN," in Proc. Asilomar Conf. Signals Syst. Comp., Pacific Grove, CA, Nov. 6-9, 2011.
  114. M. Abbas and O. Gustafsson, "Computational and Implementation Complexity of Polynomial Evaluation Schemes," in Proc. IEEE NorChip Conf., Lund, Sweden, Nov. 14-15, 2011.
  115. P. Källström and O. Gustafsson, "Magnitude Scaling for Increased SFDR in DDFS," in Proc. IEEE NorChip Conf., Lund, Sweden, Nov. 14-15, 2011.
  116. S. A. Alam and O. Gustafsson, "Implementation of Narrow-Band Frequency-Response Masking for Efficient Narrow Transition Band FIR Filters on FPGAs," in Proc. IEEE NorChip Conf., Lund, Sweden, Nov. 14-15, 2011.

National conference papers

  1. P. Löwenborg, O. Gustafsson, and L. Wanhammar, "Filter design using MATLAB," in Proc. National Conf. Radio Science (RVK), Karlskrona, Sweden, June 14-17, 1999, pp. 374-378.
  2. C. Larsson, O. Gustafsson, M. Vesterbacka, and L. Wanhammar, "A tool for manual scheduling of DSP algorithms implemented in Java," in Proc. National Conf. Radio Science (RVK), Karlskrona, Sweden, June 14-17, 1999, pp. 367-369.
  3. H. Ohlsson, W. Li, O. Gustafsson, and L. Wanhammar, "A low power architecture for implementation of digital signal processing algorithms," in Proc. Swedish System-on-Chip Conf., Falkenberg, Sweden, March 18-19, 2002.
  4. O. Gustafsson and L. Wanhammar, "Optimal logic level pipelining for digit-serial implementation of maximally fast recursive digital filters," in Proc. National Conf. Radio Science (RVK), Kista, Sweden, June 10-13, 2002.
  5. O. Gustafsson and L. Wanhammar, (invited paper) "Some issues in low power arithmetic for fixed-function DSP," in Proc. National Conf. Radio Science (RVK), Kista, Sweden, June 10-13, 2002.
  6. H. Ohlsson, O. Gustafsson, W. Li, and L. Wanhammar, "An environment for design and implementation of energy efficient digital filters," in Proc. Swedish System-on-Chip Conf., Eskilstuna, Sweden, April 8-9, 2003.
  7. O. Gustafsson and L. Wanhammar, "Design of reduced complexity linear-phase polyphase FIR filters using mixed integer linear programming," in Proc. Swedish System-on-Chip Conf., Båstad, Sweden, April 13-14, 2004.
  8. K. Johansson, O. Gustafsson, and L. Wanhammar, "Power estimation of bit-serial constant-coefficient multipliers," in Proc. Swedish System-on-Chip Conf., Båstad, Sweden, April 13-14, 2004.
  9. H. Ohlsson, O. Gustafsson, and L. Wanhammar, "Implementation of low-complexity FIR filters using difference methods," in Proc. Swedish System-on-Chip Conf., Båstad, Sweden, April 13-14, 2004.
  10. J. Löfvenberg, O. Gustafsson, K. Johansson, T. Lindkvist, H. Ohlsson, and L. Wanhammar, "New applications for coding theory in low-power electronic circuits," Swedish System-on-Chip Conf., Tammsvik, Sweden, April 18-19, 2005.
  11. K. Johansson, O. Gustafsson, and L. Wanhammar, "Estimation of switching activity for ripple-carry adders adopting the dual bit type method," Swedish System-on-Chip Conf., Tammsvik, Sweden, April 18-19, 2005.
  12. A. Blad, O. Gustafsson, and L. Wanhammar, "Early decision decoding methods for low-density parity-check codes," in Proc. Swedish System-on-Chip Conf., Tammsvik, Sweden, April 18-19, 2005.
  13. O. Gustafsson, H. Ohlsson, and L. Wanhammar, "Carry-save adder based difference methods for multiple constant multiplication in high-speed FIR filters," in Proc. National Conf. Radio Science (RVK), Linköping, Sweden, June 14-16, 2005, pp. 245-248.
  14. J. Löfvenberg, O. Gustafsson, K. Johansson, T. Lindkvist, H. Ohlsson, and L. Wanhammar, "Coding schemes for deep sub-micron data buses," in Proc. National Conf. Radio Science (RVK), Linköping, Sweden, June 14-16, 2005, pp. 257-260.
  15. K. Johansson, O. Gustafsson, A. G. Dempster, and L. Wanhammar, "Trade-offs in low power multiplier blocks using serial arithmetic," in Proc. National Conf. Radio Science (RVK), Linköping, Sweden, June 14-16, 2005, pp. 271-274.
  16. A. Blad, O. Gustafsson, and L. Wanhammar, "An LDPC decoding algorithm utilizing early decisions," in Proc. National Conf. Radio Science (RVK), Linköping, Sweden, June 14-16, 2005, pp. 445-448.
  17. D. González Muñoz, O. Gustafsson, and L. Wanhammar, "Evolution of filter order equations for linear-phase FIR filters using gene expression programming," in Proc. National Conf. Radio Science (RVK), Linköping, Sweden, June 14-16, 2005, pp. 679-682.
  18. S. Athar and O. Gustafsson, "GPS + Modernized GPS + Galileo: Signal acquisition performance," Swedish System-on-Chip Conf., Arild, Sweden, May 4-5, 2009.
  19. F. Qureshi and O. Gustafsson, "Error analysis of low-complexity reconfigurable complex constant multiplication for FFTs," Swedish System-on-Chip Conf., Arild, Sweden, May 4-5, 2009.
  20. M. Abbas, O. Gustafsson, and H. Johansson, "Roundoff noise analysis and wordlength optimization of fractional delay filters based on the Farrow structure," Swedish System-on-Chip Conf., Arild, Sweden, May 4-5, 2009.
  21. Z. U. Sheikh, H. Johansson, and O. Gustafsson, "Multiplierless realization of wideband linear-phase FIR differentiators utilizing multirate and frequency-response masking techniques," Swedish System-on-Chip Conf., Arild, Sweden, May 4-5, 2009.

Reports

  1. M. Karlsson, O. Gustafsson, J. J. Wikner, T. Johansson, W. Li, M. Hörlin, and H. Ekberg, "Understanding multiplier design using `overturned-stairs' adder trees," LiTH-ISY-R-2016, Linköping University, Sweden, Feb. 1998.


To the top
Last updated: 2011-10-25

Responsible for this page:
Oscar Gustafsson

Org.nr: 202100-3096
VAT nr: SE202100-309601
Plusgiro: 18 34 15-9

Electronics Systems
Linköpings universitet
581 83 LINKÖPING
Tel: 013-28 10 00
Fax: 013-13 92 82