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High-speed multi-rate FIR filter generator


What is hsfir?

hsfir is a software package for the generation of high-speed FIR filters. Filters are generated either on direct form or on transposed direct form. Additionally, on direct form the possibility to utilize the symmetry of linear-phase filters is supported. For each structure, the filter consists of two parts: a partial product generation part, and a carry-save adder tree pipelined to meet a pre-defined maximum depth. The software package consists of two parts:

The filter optimization part, which generates an internal representation of the filter architecture from a given impulse response, structure, arithmetic, speed and wordlength requirements. Additionally, the amount of required hardware resources is computed.

The VHDL code generation part, which generates synthesizable VHDL code from a given internal filter architecture representation. The code uses full adders, half adders, and register primitives.

Authors

hsfir has been developed by Anton Blad and Oscar Gustafsson at Electronics Systems, Linköping University, Sweden.

News

2010-06-02 hsfir-0.2 released. New features include general multi-rate FIR structures and support for adder sharing.
2009-01-12 hsfir-0.1 released.

Features

hsfir has the following features:

  • Carry-save tree realization through Wallace, Dadda, and Reduced Area heuristics.
  • Carry-save tree realization through integer linear programming-based bit-level optimization using the GNU Linear Programming Kit and SCIP.
  • Generate multi-rate structures with K input branches and N output branches.
  • Unsigned and signed data representations.
  • Binary and signed-digit coefficient representations.
  • Generation of bit-level optimized VHDL code and bit- and delay-true high-level reference VHDL code.
  • Generation of testbench and stimuli to verify correctly generated code.

Supported platforms

hsfir is written in MATLAB, and has been tested on Linux. It should also work on Windows.

License

All the code in this package is distributed under the GNU General Public License version 3:

If hsfir is used in any scientific publication, please include a reference to [1].

If the integer linear programming optimization is used, the SCIP license additionally applies. See the SCIP license for details.

Download

Links

  • The authors' paper describing the filter structures and the bit-level optimization algorithm.
  • GLPK (GNU Linear Programming Kit), used to formulate the integer linear programming problems
  • SCIP (Solving Constraint Integer Programs), the integer linear programming solver that hsfir uses.

References

[1] A. Blad and O. Gustafsson, "Integer Linear Programming-Based Bit-Level Optimization for High-Speed FIR Decimation Filter Architectures," Circuits, Systems and Signal Processing - Special Issue, Low Power Digital Filters, 21 pages, 2009. doi: 10.1007/s00034-009-9116-5.

[2] A. Blad and O. Gustafsson, "Redundancy Reduction for High-Speed FIR Filter Architectures Based on Carry-Save Adder Trees," in IEEE Int. Symp. Circuits Syst., Paris, May 30-June 2, 2010.