Energy Efficient Arithmetic

With shrinking feature sizes in modern CMOS processes, the energy consumption for integrated circuits is becoming the most important factor for most applications. Chip area and throughput are no longer limiting factors for the majority of designs. Energy consumption is important partly for the increased battery life time or decreased battery sizes and partly for problems associated with cooling and supplying enough energy to the chip core.

In CMOS circuits most of the energy is consumed by charging and discharging capacitances. In older processes the transistor capacitances were dominating, while the interconnect capacitances are dominating in modern processes. This leads to that new cost models to be used during the design flow must be derived that reflect the new situation.

In this project we focus on arithmetic operations. Primarily, we consider addition and multiplication, and especially the case where a single data is multiplied with a number of constant coefficients. In this case it is possible to utilize common partial results to decrease the number of additions. This problem is adressed using a novel mathematical formulation which has the potential to yield optimal results. Similar formulations can be used for complex multiplication, matrix multiplication and for operations in finite fields. Solutions with minimal energy consumption is also of great interest. Corresponding energy models will be derived.

For information and questions regarding this web site, please contact Oscar Gustafsson