Design and implementation of analog-to-digital converters in silicon-on-insulator technology

An often desired design strategy is the top-down design strategy. A part of this project therefore focus on behavioral level modeling of flash analog-to-digital converters (ADCs), which enables the top-down design strategy. As a result a number of flash ADCs have been designed and manufactured.

In the past ten years the silicon-on-insulator (SOI) technology have been more and more accepted as one of the future mainstream technologies. However, several unwanted effects appear when using the SOI technology, especially for analog circuits. It is therefore necessary to investigate how to design the circuits to reduce these unwanted effects. Another goal of this project is therefore to evaluate a 130 nm partially depleted SOI technology. The ADCs have therefore been manufactured using this technology.

A part of this project also demonstrates a method to introduce dynamic element matching (DEM) into flash ADCs. This ADC have also been manufactured in the partially depleted SOI technology.

A more detailed description of the background, the targeted applications, and the results are given in the links below. There is also a link to the publications produced in the context of this project.

Background
The applications
Results
Publications