TSTE85 Low Power Electronics
Given in ht2
In the course we study the design of communication systems with low power consumption. Methods and tools on all abstraction levels from system and algorithm levels down to circuits are considered. A small project on power estimation and optimization is included.
Basic course in digital circuits.
The course consists of lectures, exercises and project work.
Power dissipation in CMOS circuits. Physical bounds on low power. Switch activity and switched capacitance. Power estimation on different abstraction levels. Methods and tools for power estimation. Strategies for power optimization. Influence of supply voltage scaling and threshold voltage scaling on delay and power consumption. Multiple threshold voltage techniques. Delay balancing to minimize glitches. Synthesis of state machines. Clock distribution. Layout optimization. Design of CMOS and BiCMOS circuits for low supply voltages. Energy recovery in CMOS circuits. Power management: gating the clock, power down, and asynchronism. Algorithms for low power and algorithm transformations on different abstraction levels and data dependency. Architectures for low power. Arithmetics for low power. System partitioning. Programming for low power consumption.
Planning and material
Course plans, literature, compendias, and more detailed information are found via the links below.
Examination and lectures
Laboratory work and Project
Our offices are located in building B, entrance 25 - 27, corridor D, the top floor.
TEN1 Written exam 4.5 HP
UPG1 Project work 1.5 HP
The previous exam is available here:
- Exam 2012-12-19: LPE-T-121219u.pdf,
Next written exam is preliminary scheduled on Tuesday 26 March, time 14:00-18:00.
Some earlier exams available for download:
- Exam 2012-08-20: LPE-T-120820.pdf,
- Exam 2012-04-11: LPE-T-120411.pdf,
- Exam 2011-12-15: LPE-T-111215.pdf,
- Exam 2011-08-24: LPE-T-110824.pdf,
- Exam 2011-04-28: LPE-T-110428.pdf,
- Exam 2010-12-18: LPE-T-101218.pdf,