Responsible for this page: J Jacob Wikner , Jacob.Wikner@LiU.se
Page last update: 2012-08-30
In total there are ten scheduled lectures throughout the course. The tentative outline is found in the table below.
All lectures are given in the Nollstället conference room.
Please see http://www.es.isy.liu.se/courses/MSPS/download for the L1, L2, ..., L8.pdf files to access lecture notes.
| No | Contents | Ch. |
|---|---|---|
| 1 | Introduction by JJW (NUA) Introduction Fundamentals of targeted system. |
2.1 - 2.7 |
| 2 | Frequency tradeoffs by JJW Multirate systems, interpolation, decimation, oversampled digital-to-analog and analog-to-digital converters |
2.1 - 2.7 |
| 3 |
Top-down design by JJW System level design, top-down design methodology, signal-to-noise ratio, spurious-free-dynamic range, SNR requirement derivation, SNR estimation techniques. Test-driven development. Continuous testing. |
1, (2.8) |
| 4 |
Amplifiers by JJW Voltage amplifiers, voltage amplifier modeling, small- and large-signal analysis, dc-gain, unity-gain frequency, phase margin, offset errors, output swing, slew-rate, settling time, linear and nonlinear settling, comparators, characteristic resolution parameter, offset errors, propagation delay, speed-accuracy trade-off, offset error compensation by dynamic biasing |
7 |
| 5 |
Analog filters by JJW Relative-, multiparameter-, and parasitic sensitivity, frequency scaling, impedance scaling, standard approximations, pole-Q, cascade realization, single-amplifier active RC filters, first- and second-order sections scaling of cascaded filters, noise in active RC filters |
6 and 8 |
| 6 |
Lessons learned by JJW, NUA A lecture on how to take the course :). We list typically errors, give hints on how to attack the problems, etc. We highlight supervision rules, etc. |
N/A |
| 7 |
D/A converters by JJW Digital-to-analog converters, code-domain performance metrics, differential and integral nonlinearity, frequency-domain performance metrics, Flash DACs, binary-offset representation, DAC bit-weighting, binary-weighting, thermometer code, segmented DACs, glitches, R-2R ladder DACs, systematic and random matching errors, effect of finite current source output impedance, amplifier nonidealities, paracitics, clock jitter, bit-skew |
11 |
| 8 |
Digital filters by JJW FIR filters, Linear phase response, FIR filter design, FIR filter structures, digital and analog filter specifications standard approximations, two's complement arithmetic, overflow scaling, round-off noise in digital filters |
3, 4 & 5 |
| 9 |
Sample-and-hold (S/H) by JJW Basic sample-and-hold citcuit, need for S/H, output buffers, nonzero and signal-dependent switch resistance, nmos and pmos sampling switch, transmission-gate switch, bootstrapped sampling switch, charge injection, dummy transistors, bottom-plate sampling, clock feed-through, acquisition time, aperture time, pedestal error, droop rate, signal feed-through, kT/C noise. |
9 |
| 10 |
A/D converters by JJW SNR of uniform quantization, oversampling, A/D converter static performance metrics, integral nonlinearity, differential nonlinearity, missing codes, A/D converter dynamic performance metrics, signal-to-noise-and-distortion ratio, effective number of bits, spurious-free dynamic range, flash A/D converter topology, reference level errors, offset errors, pipeline A/D converters, effect of sub-A/D converter static errors, effect of sub-D/A converter static errors, correction techniques, redundant codes, digital post-correction |
10 |
Note: J Jacob Wikner , Niklas U Andersson (NUA)